Programmable logic devices are desirable because of the flexibility these devices offer. However, there is a continuing quest to provide additional flexibility whenever possible. Of course, added flexibility typically comes at a cost, usually in terms of additional overhead. One area where programmable logic devices have been fairly consistent in their design has been the ratio between combinatorial logic and sequential logic elements. Combinatorial logic elements, in one embodiment, refer to the lookup tables and associated support logic, while sequential logic refers to storage elements and the associated support logic. The ability for a designer to adjust or modify the combinatorial logic comes with a finer granularity relative to the ability to adjust or modify the sequential logic. For example, when considering a storage element such as a flip-flop, a designer can select one or two as a flip-flop is an element that cannot be further divided.
As a result, there is a need to solve the problems of the prior art to provide a technique for adjusting the ratio of combinatorial logic and sequential logic while minimizing any overhead incurred.